1. Field of the Invention
The present invention relates to a method of driving a plasma display panel, and particularly to a method of driving an AC plasma display panel.
2. Description of the Related Art
Plasma display panels (hereinbelow abbreviated xe2x80x9cPDPxe2x80x9d) typically offer many features including thin construction, lack of flicker, and a high display contrast ratio, and in addition are relatively amenable to large screen applications. They have a high response speed, and in emissive types can emit color visible lights using phosphors. As a result, plasma display panels increasingly are becoming widely used in recent years in the fields of computer-related display devices and color image display devices.
Depending on the mode of operation, PDP can be divided between an AC type, in which AC discharge occurs indirectly between electrodes that are covered by a dielectric material, and a DC type, in which discharge occurs by exposing electrodes in a discharge space.
The AC type can be further divided between the memory type that takes advantage of the memory effect of the display cells, and the refresh type that does not use the memory effect.
The luminance of the PDP is proportional to the number of discharges, i.e., the number of repeated pulses applied within a prescribed time interval (for example, one frame). Luminance drops as the capacitance of the display increases in the above-described refresh type, and this type is therefore chiefly used for a PDP having a low display capacitance.
The structure of a display cell of the above-described AC memory-type PDP is first described using FIG. 1.
As shown in FIG. 1, a display cell of an AC memory-type PDP is made up of: first insulating substrate 1 and second insulating substrate 2 that are composed of glass and provided on the rear and front surfaces of the panel; transparent scan electrodes 3 and sustain electrodes 4 that are formed on second insulating substrate 2 at a prescribed spacing; first trace electrodes 5 and second trace electrodes 6 that are each laminated so as to overlap over scan electrodes 3 and sustain electrodes 4, respectively, so as to decrease the electrode resistance of scan electrodes 3 and sustain electrodes 4; first dielectric layer 12 that is formed to cover each of scan electrodes 3, sustain electrodes 4, first trace electrodes 5, and second trace electrodes 6; protective layer 13 laminated on first dielectric layer 12 composed of, for example, magnesium oxide, for protecting first dielectric layer 12 from discharges; data electrodes 7 arranged on first insulating substrate 1 and formed in a direction that is orthogonal to scan electrodes 3 and sustain electrodes 4; second dielectric layer 14 formed to cover data electrodes 7; discharge gas space 8 that is formed between first insulating substrate 1 and second insulating substrate 2 and that is filled with a discharge gas composed of an inert gas such as helium, neon, or xenon, or a gas mixture of these gases; barrier ribs 9 provided on second dielectric layer 14 for both forming discharge gas spaces 8 and demarcating discharge cells; and phosphor 11 applied onto second dielectric layer 14 and to the sides of barrier ribs 9 for converting ultra-violet rays generated by discharge in discharge gas space 8 into visible light 10.
In an actual PDP such as a color display panel for VGA, the above-described display cells are arranged in a lattice pattern with 480 display cells in the vertical direction and 1920 display cells in the horizontal direction, 480 scan electrodes 3 and 1920 sustain electrodes 4 being arranged corresponding to these cells.
The discharge in a PDP constructed as shown in FIG. 1 is next explained.
Discharge begins inside the display cell shown in FIG. 1 when a pulse voltage that exceeds the discharge threshold value is applied between scan electrode 3 and data electrode 7, whereupon a positive or negative charge (wall charge) according to the polarity of this pulse voltage is attracted to and accumulated on the surface of first dielectric material 12 and second dielectric material 14.
Since the equivalent internal voltage that is generated as a result of the accumulation of this charge, i.e., the wall voltage, is of the opposite polarity of the applied pulse voltage, the effective voltage inside the cell drops with the growth of discharge. Discharge therefore cannot be sustained and eventually stops even if the above-described pulse voltage is maintained at a fixed value.
Subsequent application of a sustain pulse, which is a pulse voltage of the same polarity as the wall voltage, between scan electrode 3 and sustain electrode 4 causes a build-up in the wall voltage as the effective voltage, which thereby exceeds the discharge threshold value to bring about discharge even if the voltage amplitude of the sustain pulse applied from the outside is small. In other words, discharge is sustained by continuing to apply sustain pulses between scan electrode 3 and sustain electrode 4.
The above-described sustain discharge can be stopped by applying to scan electrode 3 or to sustain electrode 4 a sustain erase pulse, which is a either a wide low-voltage pulse or a narrow pulse of approximately the same voltage as the sustain pulse that serves to neutralize the wall voltage.
As shown in FIG. 2, a PDP is a display panel capable of dot matrix display in which display cells 20 are arranged in a lattice of m rows and n columns. The PDP is provided with scan electrodes Sc1, Sc2, . . . Scm, and sustain electrodes Su1, Su2, . . . , Sum, that are arranged parallel to each other as row electrodes, and data electrodes D1, D2, . . . Dn that are arranged as column electrodes orthogonal to the scan electrodes and sustain electrodes.
When causing any display cell 20 to emit light, scan pulses are sequentially applied to scan electrodes Sc1, Sc2, . . . , Scm, and a data pulse that is in synchronism with the scan pulses is selectively applied to data electrode Di (1xe2x89xa6ixe2x89xa6n) that is to emit light, thereby applying a voltage that exceeds the discharge threshold value (hereinbelow, referred to as xe2x80x9cwriting display dataxe2x80x9d). Emission of light is then sustained by subsequently applying sustain pulses to sustain discharge between scan electrodes Sc1, Sc2, . . . Scm and sustain electrodes Su1, Su2, . . . , Sum.
As shown in FIG. 3, the PDP drive circuit is made up of: scan electrode drive circuit 21 for applying pulse voltages to each of scan electrodes Sc1, Sc2, . . . , Scm; sustain electrode drive circuit 22 for applying pulse voltages to each of sustain electrodes Su1, Su2, . . . , Sum; data electrode drive circuit 23 for applying a voltage in accordance with image signals to each of data electrodes D1, D2, . . . , Dn; and control circuit 24 for outputting control signals to the drive circuit of each electrode based on basic signals (vertical synchronizing signals Vsync, horizontal synchronizing signals Hsync, display data signals DATA, and Clocks).
The vertical synchronizing signals Vsync prescribe the period of one frame; and the horizontal synchronizing signals Hsync are for establishing synchronization in the horizontal direction, similar to the horizontal synchronizing signals that are the control signal of a CRT (Cathode-Ray Tube). The display data signals DATA are signals for prescribing whether each display cell 20 is to emit light or not emit light in accordance with image signals, and the Clocks are signals synchronized with display data signals DATA for causing display data signals DATA to be taken into control circuit 24.
Control circuit 24 is made up of: frame memory 25 for temporarily storing display data signals DATA; memory control unit 26 for reading display data signals DATA from frame memory 25 and transferring display data signals DATA to data electrode drive circuit 23 in accordance with the timing of writing to the PDP; driver control unit 28 for generating a drive waveform that corresponds to the PDP drive sequence and transferring to each of scan electrode drive circuit 21 and sustain electrode drive circuit 22; and signal processing unit 27 for regulating the operation of memory control unit 26 and driver control unit 28 and synchronizing the timing of the operation of each drive circuit.
Drive methods for an AC memory-type PDP include a separate scan-sustain type in which the application of sustain pulses to each scan line begins simultaneously after sequentially writing the display data of one frame (or one sub-field, to be explained hereinbelow) for each scan line, and the mixed scan-sustain type in which display data are sequential written for each scan line while sustain pulses are constantly applied to each display cell.
Referring to FIG. 4, explanation is next presented regarding a prior-art PDP drive method taking the mixed scan-sustain type as an example. The PDP drive waveforms shown in FIG. 4 are described in Japanese Patent Laid-open No. 241528/1993. Wc1, Wc2, and Wc3 are the pulse waveforms that are applied to scan electrodes Sc1, Sc2 and Sc3; Wu is the pulse waveform that is applied in common to sustain electrodes Su1, Su2, . . . , Sum; Wd is the pulse waveform that is applied to data electrodes D1, D2, . . . , Dn; and Id1 is the emission waveform.
As shown in FIG. 4, a sustain pulse of negative polarity is applied in common to each of sustain electrodes Su1, Su2, . . . , Sum in the mixed scan-sustain type of PDP drive method of the prior art.
Sustain pulses of negative polarity, in common with the pulses that are applied to sustain electrodes, are applied to each of scan electrodes Sc1, Sc2, . . . , Scm, and in addition, a sequential scan pulse (SP) and sustain erase pulse (EP) are also applied sequentially by scan electrode. Positive data pulses are applied to data electrodes D1, D2, . . . , Dn in accordance with display data.
To bring about light emission in the display cell at the intersection of scan electrode Sc1 and data electrode D1, for example, a positive data pulse is applied to data electrode D1 in synchronism with the scan pulse that is applied to scan electrode Sc1. A discharge is thus brought about in the display cell at the intersection of scan electrode Sc1 and data electrode D1, and light is emitted as shown by waveform Id1. This discharge emission is sustained by continuing to apply sustain pulses to each of scan electrode Sc1 and sustain electrode Su1, and halted by applying to scan electrode Sc1 a sustain erase pulse of low voltage and narrow width.
In contrast with other display devices, however, gray-scale display is difficult to achieve by varying the applied voltage in a PDP, and gray-scale display is therefore typically achieved by controlling the number of emissions of light. In particular, a sub-field method such as shown in FIG. 5 is used to realize high-luminance gray-scale display. FIG. 5 shows an example of displaying 26=64 gray-scale levels.
In the sub-field method, as shown in FIG. 5, one frame is divided into a plurality (six in FIG. 5) of sub-fields (SF1-SF6) and a set-up discharge period, and a light emission time weight such as shown in FIG. 5 is conferred to each of these sub-fields. In FIG. 5, the light emission time weights of each sub-field progress in order from SF1 as: 25, 24, 23, 22, 21, and 20. Gray-scale display is realized by selecting emission or non-emission of light in each sub-field.
In the set-up discharge period, one discharge and erase (discharge halt) are first carried out in all display cells before writing display data to facilitate generation of write discharge by scan pulses and data pulses when all display cells are placed in an active state.
In the above-described PDP drive method, however, there is the problem of low utilization of time because other drive sequences must be suspended during the set-up discharge period. In particular, the time period that can be used for sub-fields is further limited in a case in which a plurality of set-up discharges are performed within one frame in order to allow stable generation of write discharge in sub-fields that are separated from the set-up discharge. As a result, the pulse width of the sustain pulses, scan pulses, and data pulses becomes shorter, and operation becomes unstable.
The above-described Japanese Patent Laid-open No. 241528/1993 discloses a method of minimizing the time lost in the set-up discharge periods in a case in which a plurality of set-up discharges are performed within one frame by making a sub-field that immediately precedes a set-up discharge period a sub-field with a smaller brightness weight, and moreover, altering the order of sub-fields (changing the order of weighting).
As another method of further decreasing the time lost in set-up discharge periods, Japanese Patent No. 2701725 discloses a method of performing set-up discharge on other scan lines while performing write discharge on any particular scan line.
In the method described in Japanese Patent No. 2701725, as shown in FIG. 6, pulse train that differ by scan line are applied not only to scan electrodes Sc1, Sc2, . . . , Scm but to sustain electrodes Su1, Su2, . . . , Sum as well; pulse voltages being applied to each display cell in the order: set-up discharge pulse, set-up discharge erase pulse, scan pulse, sustain pulse, and sustain erase pulse; and in addition, the timing of application of scan pulses being sequentially shifted by scan line and a corresponding data pulses being applied to each data electrode.
In the technique described in Japanese Patent No. 2701725, however, the set-up discharge pulse and scan pulse are both of negative polarity, the data pulse is of positive polarity, and all of these pulses are rectangular waves, and as a result, strong discharge occurs not only at display cells at the intersections of scan electrodes to which scan pulses are applied and data electrodes to which data pulses are applied, but also at display cells at the intersections of sustain electrodes to which set-up discharge pulses are applied and data electrodes to which data pulses are applied that are synchronized with these set-up discharge pulses. The problem therefore arises that the set-up discharge causes the entire background brightness of the PDP to increase, and the background brightness further varies with the pattern of the image display.
A method is described in U.S. Pat. No. 5,745,086 for preventing increase in background brightness by applying a gradually rising set-up discharge pulse and weakening the intensity of the set-up discharge. The drive method described in U.S. Pat. No. 5,745,086, however, is an invention relating to the separated scan-sustain type of PDP drive method in which the set-up discharge period, write discharge period, and sustain discharge period are each entirely separated from each other, and discloses nothing relating to the mixed scan-sustain type of PDP drive method, such as the method described in Japanese Patent No. 2701725.
It is an object of the present invention to provide a PDP drive method and drive circuit of the mixed scan-sustain type that reduces the time loss caused by set-up discharge period while suppressing increase in the background brightness caused by set-up discharge.
To achieve the above-described object according to the PDP drive method of the present invention, in a PDP drive method of the mixed scan-sustain type, when any particular scan line is in a write period, a set-up discharge is carried out in the scan line that is to be scanned next. At this time, a gradually rising first set-up discharge pulse that is of the opposite polarity of the scan pulses is applied to the scan electrodes of the scan line that is in a set-up discharge period, and a second set-up discharge pulse that is a rectangular or a gradually rising pulse of the same polarity as the scan pulse, and moreover, that is of lower voltage than the scan pulses, is applied to the sustain electrodes. The voltage of the second set-up discharge pulse in this case is a value such that discharge occurs with the first set-up discharge pulse, and such that discharge does not occur with a data pulse. In this way, the occurrence of discharge due to the set-up discharge pulse and a data pulse that is applied to data electrodes can be prevented, thereby preventing increase in the background brightness of the PDP.
Further, a set-up discharge erase pulse for eliminating set-up discharge and a sustain erase pulse for eliminating sustain discharge are applied with the same gradually falling pulse shape. The circuit for outputting the set-up discharge erase pulse and sustain erase pulse thus can be shared, thereby limiting increase in circuit scale.
Finally, one frame is divided into a plurality of sub-fields and all sub-fields within one frame are displayed by scan line, gray-scale display being realized by the combinations of the emission and non-emission of light of sub-fields. Since the need for providing a time interval at this time for set-up discharge is thus eliminated, the time of suspended emission of light between sub-fields can be reduced and the luminance of the plasma display panel can be increased.
In addition, one frame is divided into a plurality of sub-fields and the display of all scan lines by each sub-field takes the time of one frame, gray-scale display being realized by the combination of emission or non-emission of light of the sub-fields. The time of suspension of light emission between sub-fields is therefore further shortened, further increasing the luminance of the plasma display panel.
The above and other objects, features, and advantages of the present invention will become apparent from the following description based on the accompanying drawings which illustrate examples of preferred embodiments of the present invention.